Data Communication · Lecture 6
Digital-to-Digital Conversion
Line coding, block coding and scrambling: putting bits on a wire
Md Mahbub E Noor · Assistant Professor, Department of CSE, University of Barishal
Course: Data Communication · 2nd Year, 2nd Semester
From bits to a digital signal: today's goals
- Distinguish data elements from signal elements; compute bit rate, baud rate and bandwidth
- Explain baseline wander, DC components and self-synchronisation
- Encode bits with unipolar, polar, biphase, bipolar, multilevel and MLT-3 schemes
- Apply 4B/5B and 8B/10B block coding
- Apply B8ZS and HDB3 scrambling
Where we are
| Lecture | Conversion |
|---|---|
| 5 | Analog → digital (PCM gave us bits) |
| 6 · today | Digital data → digital signal |
| 7 | Digital → analog (modulation) |
| 8 | Analog → analog |
Reading: Forouzan, Section 4.1 (line coding, block coding, scrambling)
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
2 / 33
Data elements and signal elements
- A data element is the smallest piece of information: one bit
- A signal element is the shortest unit of a digital signal: one level held for a time
- r = number of data elements carried by each signal element
- r = 1 (NRZ), r = 1/2 (Manchester), r = 2 (2B1Q), r = 4/3 (8B6T)
1 bit → 1 element (NRZ) · r = 1
1 bit → 2 elements (Manchester) · r = 1/2
2 bits → 1 element (2B1Q) · r = 2
8 bits → 6 elements (8B6T) · r = 4/3
Three levels: 3⁶ = 729 patterns carry 2⁸ = 256 data values
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
3 / 33
Bit rate, signal rate and bandwidth
- Bit rate N: data elements per second (bps)
- Signal rate S (baud rate, pulse rate): signal elements per second (baud)
- Fewer signal elements per second need less bandwidth: we want S small
- The case factor c depends on the data pattern (all 1s, alternating, random)
S = c × N × (1 / r) baud
Bmin ≈ S
Nmax = (1 / c) × B × r
N = bit rate (bps) · S = signal rate (baud) · c = case factor: 1 worst, 1/2 average, 0 best
Worked example: N = 100 kbps, r = 1, average case c = 1/2
S = 1/2 × 100,000 × 1
50 kbaud
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
4 / 33
Three problems a good line code must solve
- Baseline wander: the receiver compares each level with a running average; long runs drag the average
- DC component: a non-zero average voltage; many channels block very low frequencies
- Self-synchronisation: the signal itself must keep the receiver's clock in step
- Also wanted: built-in error detection, noise immunity and low complexity
Baseline wander: the receiver's running average (dashed) drifts during long runs
| Problem | What goes wrong | Wanted |
|---|---|---|
| Baseline wander | the threshold drifts, so bits are misread | frequent changes |
| DC component | transformers and some channels cannot pass 0 Hz | average level 0 |
| Self-synchronisation | receiver's clock drifts without transitions | transitions every bit or few bits |
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
5 / 33
Worked example: why self-synchronisation matters
- Problem: the receiver's clock runs 0.1% faster than the sender's
- At 1 kbps the receiver samples 1,001 times per second: 1 extra bit each second
- At 1 Mbps it samples 1,001,000 times: 1,000 extra bits each second
- Transitions in the signal let the receiver correct its clock before errors pile up
1 kbps link, receiver clock 0.1% fast
1,000 × 1.001 = 1,001 bits counted per second
1 extra bit/s
1 Mbps link, same clock error
1,000,000 × 1.001 = 1,001,000
1,000 extra bits/s
The faster the link, the more damage the same clock error does, so high-speed codes must self-synchronise.
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
6 / 33
Checkpoint 1 · 3 minutes
Check your understanding
Q1
A signal has r = 2 and N = 1 Mbps. What is the average signal rate (c = 1/2)?
Q2
Why can't an Ethernet port's transformer carry unipolar NRZ well?
Q3
A 10 Mbps link with a 0.05% fast receiver clock: how many extra bits per second?
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
7 / 33
Five families of line coding
Unipolar
NRZ
one polarity: 0 V and +V
Polar
NRZ-L, NRZ-I
RZ
Biphase: Manchester, differential Manchester
Bipolar
AMI
Pseudoternary
three levels: +, 0, −
Multilevel
2B1Q
8B6T
4D-PAM5
m bits → n signal elements
Multitransition
MLT-3
three levels, cycling rule
We use one test pattern throughout: 01001110, as in Forouzan's figures. Draw each code yourself before looking.
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
8 / 33
Unipolar NRZ: the simplest code
- All signal levels are on one side of zero: 1 = +V, 0 = 0 V
- NRZ (non-return-to-zero): the level is held for the whole bit
- Costly: it uses twice the power of polar NRZ for the same noise immunity
- Rarely used today; it is the code we used at the end of Lecture 5
Unipolar NRZ · 1 = +V, 0 = 0 V
0
1
0
0
1
1
1
0
| Measure | Unipolar NRZ |
|---|---|
| Average level (DC) | large, positive |
| Normalised power | twice that of polar NRZ |
| Self-synchronising? | no: long runs are flat |
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
9 / 33
Polar NRZ: NRZ-L and NRZ-I
- NRZ-L (level): the voltage level itself gives the bit; in Forouzan, 0 = positive, 1 = negative
- NRZ-I (invert): a 1 inverts the level at the start of the bit; a 0 leaves it unchanged
- Polar levels ±V can average to zero, but long runs still create DC and wander
- NRZ-I survives a polarity swap in the cable, because only changes carry information
NRZ-L · level decides: 0 = +V, 1 = −V
0
1
0
0
1
1
1
0
NRZ-I · 1 = invert, 0 = no change
0
1
0
0
1
1
1
0
Average signal rate S = N/2 for both. NRZ-L fails on long 0s and long 1s; NRZ-I only on long 0s.
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
10 / 33
Return-to-zero (RZ)
- The signal goes to zero in the middle of every bit
- 1 = positive for the first half; 0 = negative for the first half
- The mid-bit return gives a transition in every bit: self-synchronising
- Cost: two signal changes per bit, three levels, more bandwidth; largely replaced by Manchester
Polar RZ · 1 = +V then 0, 0 = −V then 0
0
1
0
0
1
1
1
0
| Property | RZ |
|---|---|
| Levels | three: +V, 0, −V |
| Signal changes per bit | two |
| Self-synchronising? | yes |
| Bandwidth | higher than NRZ |
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
11 / 33
Biphase: Manchester and differential Manchester
- Manchester = RZ's mid-bit transition + NRZ-L's two levels
- In Forouzan: 0 = high-to-low in mid-bit, 1 = low-to-high
- Differential Manchester = RZ + NRZ-I: always a mid-bit flip; an extra flip at the start for 0, none for 1
- Used in 10 Mbps Ethernet (Manchester) and Token Ring (differential Manchester)
Manchester · 0 = high→low, 1 = low→high
0
1
0
0
1
1
1
0
Differential Manchester · always flip mid-bit; flip at the start of a 0
0
1
0
0
1
1
1
0
Both: transition in the middle of every bit (clock), no DC, but S = N, so twice the bandwidth of NRZ.
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
12 / 33
One pattern, eight codes: 01001110
bits →
0
1
0
0
1
1
1
0
Unipolar NRZ
NRZ-L
NRZ-I
RZ
Manchester
Diff. Manchester
AMI
MLT-3
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
13 / 33
Bipolar: AMI and pseudoternary
- Three levels: positive, zero and negative
- AMI (alternate mark inversion): 0 = zero; each 1 is the opposite polarity of the previous 1
- Pseudoternary: the roles swap: 1 = zero, 0s alternate
- Alternating pulses cancel, so there is no DC component; a broken rule signals an error
- Used on T1 lines; long runs of 0s need scrambling (B8ZS, HDB3)
Bipolar AMI · 0 = 0 V, 1s alternate + and −
0
1
0
0
1
1
1
0
Pseudoternary · 1 = 0 V, 0s alternate + and −
0
1
0
0
1
1
1
0
Average signal rate N/2, no DC (pulses alternate). AMI loses sync on long runs of 0s, which scrambling fixes.
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
14 / 33
Checkpoint 2 · 3 minutes
Check your understanding
Q1
Encode 10110 in NRZ-I, starting from a high level.
Q2
Encode 1100 in Manchester (Forouzan convention).
Q3
In AMI, the receiver sees +, 0, +. What does it conclude?
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
15 / 33
Multilevel coding: 2B1Q
- Multilevel (mBnL) schemes map m bits onto n signal elements with L levels, keeping 2ᵐ ≤ Lⁿ
- 2B1Q: 2 binary bits → 1 quaternary (four-level) signal element
- Data rate is twice NRZ-L's for the same baud rate
- Used in ISDN and early DSL on telephone lines
| Bits | 00 | 01 | 10 | 11 |
|---|---|---|---|---|
| Level | −3 | −1 | +3 | +1 |
2B1Q for 11 00 01 11 10 → +1, −3, −1, +1, +3
11
00
01
11
10
r = 2, so S = N/4 on average: half the baud rate of NRZ. Price: four levels to tell apart.
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
16 / 33
More multilevel codes: 8B6T and 4D-PAM5
8B6T
8 binary bits → 6 ternary (three-level: +, 0, −) signal elements
3⁶ = 729 patterns for 2⁸ = 256 data values: 473 spare patterns for synchronisation and error detection
DC balance: if two weight-+1 patterns come in a row, the second is inverted
Average S ≈ 3N/4 · used in 100BASE-T4 Ethernet
4D-PAM5
Five levels (−2 … +2) sent over four wire pairs at once (four dimensions)
8 bits travel as one group of 4 parallel symbols; level 0 used for error correction
1 Gbps over four pairs at 125 Mbaud each
S = N/8 per pair · used in 1000BASE-T Gigabit Ethernet
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
17 / 33
Multitransition: MLT-3
- Three levels (+V, 0, −V) and a cycling rule
- A 1 means move to the next level in the cycle; a 0 means stay
- Worst case (all 1s): one full cycle per 4 bits, so the signal behaves like a wave at N/4
- Used with 4B/5B in 100BASE-TX Fast Ethernet over Cat 5
Cycle: 0 → +V → 0 → −V → 0 …
Each 1 moves one step around the cycle
Each 0 stays at the same level
MLT-3 · eight 1s: one full cycle every 4 bits
1
1
1
1
1
1
1
1
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
18 / 33
Line coding schemes at a glance
| Category | Scheme | Bandwidth (average) | Characteristics |
|---|---|---|---|
| Unipolar | NRZ | N/2 | Costly; no self-sync on long 0s or 1s; DC |
| Polar | NRZ-L | N/2 | No self-sync on long 0s or 1s; DC |
| Polar | NRZ-I | N/2 | No self-sync on long 0s; DC |
| Polar | Manchester / diff. Manchester | N | Self-sync; no DC; high bandwidth |
| Bipolar | AMI | N/2 | No self-sync on long 0s; no DC |
| Multilevel | 2B1Q | N/4 | No self-sync on long runs of the same pair |
| Multilevel | 8B6T | 3N/4 | Self-sync; no DC |
| Multilevel | 4D-PAM5 | N/8 | Self-sync; no DC |
| Multitransition | MLT-3 | N/3 | No self-sync on long 0s |
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
19 / 33
Try it: one bit pattern, many line codes
Interactive
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
20 / 33
Try it yourself: Line Coding Lab
- 1 · Line codes: type any bits; see up to 10 codes stacked, with transitions and DC level
- 2 · 4B/5B: watch long runs of 0s disappear
- 3 · Scrambling: AMI, B8ZS and HDB3 side by side, with V and B pulses marked
- Load the Fig. 4.26 bits from Lecture 5 with one click
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
21 / 33
Block coding: adding redundancy on purpose
- mB/nB: replace each m-bit group with an n-bit code (n > m)
- There are 2ⁿ codes but only 2ᵐ are used, so we pick the ones with good properties
- Goals: guarantee enough 1s (transitions) and detect invalid codes as errors
- Block coding comes before line coding: it changes bits into bits
Divide
into m-bit groups
Substitute
each group by an n-bit code
Combine
into the new stream
| Code | m → n | Unused codes | Overhead |
|---|---|---|---|
| 4B/5B | 4 → 5 | 32 − 16 = 16 | 25% |
| 8B/10B | 8 → 10 | 1,024 − 256 = 768 | 25% |
| 64B/66B | 64 → 66 | (2-bit header) | ≈ 3% |
Then a line code carries the coded stream: e.g. 4B/5B + NRZ-I, or 4B/5B + MLT-3.
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
22 / 33
4B/5B: the code behind Fast Ethernet
- Each 4-bit group becomes a 5-bit code from the table
- No code has more than one leading 0 or more than two trailing 0s
- So the coded stream never contains more than three 0s in a row
- 100 Mbps data → 125 Mbps on the line (25% more), then NRZ-I or MLT-3
| Data | Code | Data | Code |
|---|---|---|---|
| 0000 | 11110 | 1000 | 10010 |
| 0001 | 01001 | 1001 | 10011 |
| 0010 | 10100 | 1010 | 10110 |
| 0011 | 10101 | 1011 | 10111 |
| 0100 | 01010 | 1100 | 11010 |
| 0101 | 01011 | 1101 | 11011 |
| 0110 | 01110 | 1110 | 11100 |
| 0111 | 01111 | 1111 | 11101 |
Worked example: 1101 0000
1101 → 11011, 0000 → 11110
11011 11110
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
23 / 33
Try it: 4B/5B removes long zero runs
Interactive
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
24 / 33
8B/10B: better balance for faster links
- 8-bit bytes become 10-bit codes: 1,024 patterns for 256 bytes
- Each code has at most one more 1 than 0, or vice versa
- The encoder alternates between two versions of a code to keep the long-run balance at zero
- Detects many errors: invalid codes or a wrong disparity
| Property | 8B/10B |
|---|---|
| Groups | 8 bits → 10 bits (internally 5B/6B + 3B/4B) |
| DC balance | codes chosen with equal or nearly equal 0s and 1s |
| Running disparity | tracks whether more 1s or 0s were sent; picks the code that balances |
| Run length | never more than five identical bits |
| Used in | Gigabit Ethernet over fibre, PCI Express 1 and 2, USB 3.0, SATA |
Same 25% overhead as 4B/5B, but better DC balance and error detection. Newer links use 64B/66B or 128B/130B to cut overhead.
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
25 / 33
Scrambling with B8ZS: no more long zero runs
- Scrambling changes the signal, not the bit rate: no extra bits are added
- B8ZS (bipolar with 8-zero substitution) replaces eight 0s with 000VB0VB
- Two violations in a fixed position cannot happen naturally, so the receiver recognises and removes them
- Used with AMI on T1 lines
AMI · eight 0s → flat, no transitions
1
1
0
0
0
0
0
0
0
0
1
1
0
B8ZS · eight 0s → 000VB0VB
1
1
0
0
0
0
0
0
0
0
1
1
0
·
·
·
·
·
V
B
·
V
B
·
·
·
V (violation) has the same polarity as the previous pulse, breaking AMI on purpose; B obeys AMI.
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
26 / 33
Scrambling with HDB3
- HDB3 (high-density bipolar 3-zero) allows at most three 0s in a row
- Every four consecutive 0s are replaced by 000V or B00V
- The choice depends on how many non-zero pulses were sent since the last substitution
- Used with AMI on E1 lines (Europe and most of Asia)
| Non-zero pulses since the last substitution | Four 0s become |
|---|---|
| odd | 000V |
| even | B00V |
HDB3 example
1
0
0
0
0
1
0
0
0
0
0
0
0
0
·
·
·
·
V
·
·
·
·
V
B
·
·
V
Choosing 000V or B00V makes the V pulses alternate in polarity, so they never build up a DC level.
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
27 / 33
Try it: scramble long runs of zeros
Interactive
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
28 / 33
Back to Lecture 5: Example C on the wire
codes →
100
110
110
101
100
011
011
001
000
001
NRZ-L
Manchester
AMI
NRZ-L: flat during 000 and the 11 runs · Manchester: a transition in every bit · AMI: no DC, but flat over 0s (HDB3 would fix 000 + the next 0)
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
29 / 33
See it in action: bits on a wire
- Watch a receiver's clock drift on a flat NRZ signal
- See Manchester's mid-bit transitions keep the clock in step
- Watch AMI remove DC and B8ZS break up a run of zeros
- When a “Pause & predict” card appears, answer before the video moves on
Click the video to play or pause · Press → for full screen
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
30 / 33
Checkpoint 3 · 3 minutes
Check your understanding
Q1
Encode 0110 in differential Manchester, assuming the line ends high before the first bit.
Q2
Apply 4B/5B to 0000 1010. How many bits are sent, and what are they?
Q3
AMI with B8ZS: the last pulse was −, then come eight 0s. What is sent?
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
32 / 33
Key takeaways
- Signal rate S = c × N / r; bandwidth follows S, so we want few signal elements per bit
- Good line codes avoid baseline wander and DC and keep the receiver in sync
- NRZ is cheap but flat on long runs; Manchester syncs every bit but doubles bandwidth
- AMI removes DC; multilevel codes (2B1Q, 8B6T, 4D-PAM5) cut the baud rate
- Block codes (4B/5B, 8B/10B) and scrambling (B8ZS, HDB3) remove long runs of 0s
Next lecture
Lecture 7 · Digital-to-Analog Conversion
Putting bits onto a carrier wave: ASK, FSK, PSK and QAM, with constellation diagrams and Wi-Fi as the running example.
Reading: Forouzan, Section 5.1 · Practise in Line Coding Lab
Md Mahbub E Noor
Lecture 6: Digital-to-Digital Conversion
University of Barishal
33 / 33